Typically, a trench of a semiconductor device is formed by sequentially depositing a pad oxide layer (SiO2) and a nitride layer (SiNx) on a silicon substrate. The pad oxide layer and the nitride layer are patterned to expose the silicon substrate. Then, the exposed silicon substrate is etched to a predetermined depth using the patterned nitride layer as an etch protection layer to thereby form a trench pattern in the silicon substrate.
Subsequently, a thermal oxide layer is formed inside the trench pattern via a thermal oxidation process. Another oxide layer is deposited over the thermal oxide layer within the shallow trench. The oxide layer is thermally treated to form a shallow trench isolation (STI) structure within the trench pattern. The STI formed on the semiconductor substrate is planarized through a chemical mechanical polishing process (CMP) to complete the STI film.
However, the conventional STI fabrication method has drawbacks. For example, it is difficult to reduce the linewidth of the STI film. Further, scratches and particles may occur during the CMP process.
To clarify multiple layers and regions, the thickness of the layers are enlarged in the drawings. Wherever possible, the same reference numbers will be used throughout the drawing(s) and accompanying written description to refer to the same or like parts. As used in this patent, stating that any part (e.g., a layer, film, area, or plate) is in any way positioned on (e.g., positioned on, located on, disposed on, or formed on, etc.) another part, means that the referenced part is either in contact with the other part, or that the referenced part is above the other part with one or more intermediate part(s) located therebetween. Stating that any part is in contact with another part means that there is no intermediate part between the two parts.